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      Intel Corporation

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      Entrevistas en Intel CorporationEntrevistas para el cargo de Senior ASIC Design Engineer en Intel CorporationEntrevista en Intel Corporation


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      Entrevista para Senior ASIC Design Engineer

      9 de sept de 2013
      Candidato de entrevista anónimo
      Hillsboro, OR
      Oferta rechazada
      Experiencia positiva
      Entrevista fácil

      Solicitud

      Me postulé en línea. El proceso tomó 2 meses. Acudí a una entrevista en Intel Corporation (Hillsboro, OR) en ago 2013

      Entrevista

      I was contacted by a hiring manager by email and we set up an hr. long phone screen a week or so later. I was asked a bunch of questions about DRC methodology even though my expertise was in LVS. I was able to answer them fairly well though and was told I should get an invitation for an on site interview. It took a couple weeks but I got the interview and after a mild amount of confusion between me the hiring manager and the HR folks I got the date straightened around. They paid for the entire trip and booking it was easy and smooth. The interview came around and was a round robin style with people in the department I'd be joining. I did not find it too difficult some of the job descriptions were about things that were not on my resume and they asked me briefly about those to see what I knew but did not press me and focused on discussing topics related to what was on my resume (physical verification and some scripting) or just general problem solving issues. It went pretty well and a few of the engineers were enthusiastic about me joining the team. I got an offer about 3 weeks after the interview. (I got positive feed back from the hiring manager within a couple days though).

      Preguntas de entrevista [1]

      Pregunta 1

      Nothing really, some pros/cons of different physical verification tools, how to filter through 100k+ errors, how to solve chip level LVS issues. Should be easy for experience engineers to answer.
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