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      Entrevistas en QualcommEntrevistas para el cargo de ASIC Design Engineer en QualcommEntrevista en Qualcomm


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      Entrevista para ASIC Design Engineer

      17 de jun de 2021
      Empleado anónimo
      Markham, ON

      Otras evaluaciones sobre las entrevistas para el cargo de ASIC Design Engineer en Qualcomm

      Entrevista para ASIC Design Engineer

      13 de may de 2026
      Candidato de entrevista anónimo
      Mississauga, ON
      Sin ofertas
      Oferta aceptada
      Experiencia positiva
      Entrevista promedio

      Solicitud

      Me postulé a través de un reclutador. El proceso tomó 2 meses. Acudí a una entrevista en Qualcomm (Markham, ON) en abr 2021

      Entrevista

      All interviews are held on Teams during covid-19. First round is 30-min with the hiring manager, manager briefly introduced what the team does and talked about things on my resume. Second round is 2-hr technical with 2 people from the team (was originally told in the email to be 4-hr with 4 people). Went through things I did in current company and some technical questions. Be prepared to explain projects you did in details (inputs, outputs, logic size, lines of code, etc.) Last round is 30-min with HR. Typical behavior questions.

      Preguntas de entrevista [4]

      Pregunta 1

      Write some codes to explain how to design asynchronous FIFO.
      1 respuesta

      Pregunta 2

      Describe a time when you need to gather information from different sources to troubleshoot an issue.
      Responder pregunta

      Pregunta 3

      Describe a project where you have to regularly communicate with team members.
      Responder pregunta

      Pregunta 4

      Describe a time when you have to overcome a setback on a project.
      Responder pregunta
      4
      Experiencia positiva
      Entrevista promedio

      Solicitud

      Acudí a una entrevista en Qualcomm (Mississauga, ON)

      Entrevista

      I had 6 rounds total. The first two were with senior directors who really drilled into my past projects and took time to walk me through the team's work and org structure — they seemed genuinely engaged. Then I had three rounds with staff engineers. We covered some coding questions I wrote edge detection logic and an FSM, but I made a couple of mistakes on the first pass that I caught and corrected when the interviewers pointed them out. We also talked about DV concepts like reference models and how to build self-checking testbenches. The final round was with a senior MTS from the Markham office, and it was pure behavioral no technical questions, just asking about my background and team fit.

      Entrevista para ASIC Design Engineer

      10 de feb de 2026
      Empleado anónimo
      Toronto, ON
      Oferta aceptada
      Experiencia positiva
      Entrevista promedio

      Solicitud

      Acudí a una entrevista en Qualcomm (Toronto, ON)

      Entrevista

      2 stage interview with first interview to get to know the position and team. 2nd interview was ~1hr long with all technical questions. Write a counter, make a nand gate with muxes, name some cdc/lint violations.

      Preguntas de entrevista [1]

      Pregunta 1

      Write verilog for a counter, make a nand gate with muxes
      Responder pregunta

      Entrevista para ASIC Design Engineer

      10 de may de 2022
      Empleado anónimo
      Oferta aceptada
      Experiencia positiva
      Entrevista difícil

      Solicitud

      Acudí a una entrevista en Qualcomm

      Entrevista

      Had a phone interview first. Then was called for on site interview. Had 6 interviews. One of them was on software, One was on basic circuits (undergrad level), other were SRAM design.

      Preguntas de entrevista [1]

      Pregunta 1

      Explain Setup and hold for a latch.
      Responder pregunta
      5