Me postulé a través de otra fuente. El proceso tomó 2 días. Acudí a una entrevista en MAXVY (Bengaluru) en jul 2025
Entrevista
Interview very easy asked about the design a counter in verilog and they asked the reasoning in aptitude and in exam they asked basics of verilog design of gray to binary conversion and about the mux design in verilog using conditional operator
Me postulé a través de otra fuente. El proceso tomó 1 día. Acudí a una entrevista en MAXVY (Bengaluru) en feb 2025
Entrevista
good and aptitude was easy , but it pretty small company for internship u can try this company but its unpaid and after full time also salary most probably less compare to others
Me postulé en línea. El proceso tomó 1 día. Acudí a una entrevista en MAXVY (Bengaluru) en may 2024
Entrevista
First round is written test, second round is technical. They asked theoretical and practical questions mixed, and they asked some problems. In second round they covered Verilog, System Verilog, UVM. In first round total 25 questions, 5 aptitude questions included.
Preguntas de entrevista [1]
Pregunta 1
In Verilog, blocking and non blocking, continuous and procedural, monitor and strobe, task and function. In system Verilog, logic and reg, dynamic and queue, interface and mailbox, constraints and randomisation.