The whole interview process consisted of 3 rounds i.e.
1. Screening
2. Technical Round
3. HR Round
The technical round consisted of questions from both technical background and the logical questions but I couldn't make it to the HR round.
Me postulé a través de una facultad o universidad. El proceso tomó 2 días. Acudí a una entrevista en Cadence Design Systems (Allahabad) en mar 2019
Entrevista
The interview process was quite good. They mainly focussed on your thinking abilities and technical skills. The first shortlisting was done on the basis of written rounds which was pen-paper based. The first paper was a subjective aptitude paper , the second was an objective aptitude paper and the third paper was hardware technical paper. Based on cumulative scores in all these 7 students were shortlisted for the next round . Then there was again a pen and paper test round of hardware ,based on performance in that two students were shortlisted for interview and finally one student got selected.
Preguntas de entrevista [1]
Pregunta 1
They mainly asked digital hardware, verilog and digital CMOS design.
Me postulé a través de una agencia de empleos. El proceso tomó 3 semanas. Acudí a una entrevista en Cadence Design Systems en oct 2016
Entrevista
I applied through off campus. I am Mtech VLSI design 2016 passout. My profile got shortlisted through monster.com for the intern position in Noida location.There were two telephonic interviews. First interview was purely technical. Questions asked were basic. starting from introduce yourself and then about my final year master thesis project. What difficulties faced in my project. how did I resolved it. My project was in FPGA Design. Then there were questions on CMOS inverter. Gain calculation, delay calculation, what are low power techniques, why we go for such techniques,then tool knowledge like cadence encounter ,virtuoso. As my resume mentioned knowledge of ASIC flow, some of the questions on hold time, setup time,timing violations , slack. How to calculate delay manually in a inverter. Then after 10 days I had second telephonic interview. In that i was asked whether I am ready to relocate. Then few technical questions floorplanning, partitioning,routing,etc. Whether I was clear about my role(it was mentioned in when i was applying). I was selected for the intern position.
Preguntas de entrevista [1]
Pregunta 1
1. How to calculate delay of inverter manually?
2. what i setup time, hold time, setup and hold violations?
3. How to calculate gain in CMOS inverter?
4. What timing slack? What is critical path?
