Me postulé a través de una facultad o universidad. Acudí a una entrevista en Arm (Austin, TX) en sept 2014
Entrevista
It's a ARM draft day. On that day, there were about 20 candidates. In the morning, they introduced a lot about the company, the product, the benefit. Then everyone had 4 interviews from noon to afternoon. The interviews are not very easy, more than what I learn in the course. But interviewer are nice and will give you the hint to answer the question.
Thanks for leaving a review regarding your experience on ARM Draft Day. If there's anything you feel that we could have done to make the interview experience better, please do not hesitate to let us know!
-Rick C.
Social Recruiting Manager
Otras evaluaciones sobre las entrevistas para el cargo de Graduate Design Engineer en Arm
Me postulé a través de otra fuente. El proceso tomó 1 día. Acudí a una entrevista en Arm (Austin, TX) en dic 2014
Entrevista
I had four technical interviews with four different members of my future team one after the other followed by a "get-to-know you" interview by my future boss. Each of the technical interviews differed based on the knowledge and skills of the interviewer. i.e. one asked questions about programming in C++ another asked about computer architecture and microarchitecture, etc.
Me postulé en línea. El proceso tomó 3 semanas. Acudí a una entrevista en Arm (Austin, TX) en mar 2014
Entrevista
I'd applied online for the position and got a call after 2 months. There was a two hour phone screen by two senior design engineers which consisted of basic digital VLSI questions like logical effort, impact of scaling, types of power, crosstalk issues and some basic questions on number system conversions. A week later, I was invited for an onsite interview at Austin which consisted of 7 rounds of 1:1 interview including an HR round. I felt the interviews covered almost all the aspects of ASIC design flow ranging from RTL coding to layout. Overall, the questions were mostly basic stuffs from timing(setup/hold), verilog coding, IR drop issues, clock tree synthesis, placement, routing etc.
Preguntas de entrevista [1]
Pregunta 1
Some questions on clock tree where you have to come up with a possible design solution in order to keep the clock latency low.