Me postulé en línea. El proceso tomó 2 semanas. Acudí a una entrevista en Apple (Cupertino, CA) en nov 2021
Entrevista
The interviewer was friendly and it was more like a discussion than an interview. He inquired about the relevant projects I had done, and asked me to explain why I did things the way I did.
Preguntas de entrevista [1]
Pregunta 1
How experienced are you with TCL?
What needs to be done before sending a design out for fabrication?
Me postulé en línea. Acudí a una entrevista en Apple (Austin, TX) en may 2025
Entrevista
HR called me regarding this and later had a hiring manager round initially and later 5 round panel. There was gap of 1 week between the hiring manager round and the panel. The panel round span around two days.
Round1 Questions:
1) Aysnc FIFO vs sync FIFO meaning.
2) Why do we have sync FIFO. How do u check the full and empty condition.
3) How do you write the scoreboard?
4) What coverage has been checked?
5) Verilog code for 4-bit shift register.
6) What type of encoding is used in async FIFO?
7) Write an assertion to check if gray code is violated or not?
8) |-> and |=> what is the difference. Also the difference between |=> and ##1.
9) Question regarding probability constraints.